Function generator

ABSTRACT

A storage capacitance across which a ramp function signal is to be generated is serially related through a fixed resistor, electric signal variable-voltage solid-state device to a source of charging current. The potential developed across the capacitance is one input to a differential amplifier. Selectively variable potentiometers relate the differential amplifier output to the variable-voltage device correspondingly controlling the capacitance charging current. A further aspect is the use of back-to-back diodes for appropriate poling of the signal from the potentiometers to the solid-state device.

CENTRIFUGIE CONTROL SYSTEM BACKGROUND OF THE INVENTION Many types of centrifuge units are on the market for laboratory and other uses. These centrifuges, for the most part, comprise an outer housing with an inner rotating head or rotor, the rotor being driven by an electric motor at a high speed so as to establish the desired centrifugal forces within the apparatus. The apparatus is also usually provided with a hinged lid, and associated electrical controls.

One of the electrical controls which is incorporated into the prior art centrifuge units is a timer, which can be set so that the unit will continue for a predetermined time interval, and will then automatically stop. One of the features of the present invention is the provision of an improved timing control, which may be conveniently set to any one of a number of preselected time intervals, and when so set causes the apparatus to be activated precisely for that interval.

Another feature of the invention is the provision of an improved latching control for the lid of the centrifuge which prevents the lid from being opened until the centrifuge rotor slows down to a safe speed, after it has been deenergized. Many accidents in the past have occurred when the technician turns off the power to the centrifuge, and then opens the lid and attempts to remove the carriers from the centrifuge rotor head before it has slowed down to a safe speed.

As mentioned above, the latching control system of the invention also prevents the centrifuge motor from being energized until the lid is closed and latched at the beginning of each operation.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. l is a side perspective view of a typical centrifuge apparatus, which may incorporate the improved control system of the invention;

FIG. 2 is a detail of a drive assembly to be mounted in the apparatus of FIG. ll;

FIG. 3 is a view taken along the line 3-3 of FIG. ll;

FIG. 4 is a top view of the latching mechanism, with the cover of the mechanism removed so as to reveal the internal operating components;

FIG. 5 is a head rotation sensor which senses the rotation of the rotoi to produce pulses for controlling the latch control mechanism;

FIG. 6 is a circuit diagram of the timer control circuitry included in the control system of the invention;

FIG. 7 is a perspective view of the mechanical details of a timer control unit which may be incorporated into the apparatus in accordance with the concepts of the invention;

FIG. 8 is a section along the line 8-'-8 of FIG. 7; and

FIG. 9 is a perspective view of one component of the control unit of FIG. 7.

DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENT The centrifuge apparatus shown in FIGS. 1 and 2, for example, is a commercial unit made by the Phillips-Drucker Corporation of Astoria, Oregon. The illustrated unit includes, for example, an external housing 10 which may be supported on ball bearing casters 12. A lid 20 is hinged to the top 18 of the housing by means, for example, of an appropriate hinge 22, and the lid is held closed by means of a latch assembly 24. An electric motor assembly 26 (FIG. 2) is suspended within the housing I0 by means, for example, of appropriate resilient hangers such as the hanger 28. The motor 26 drives a shaft 27 which is mounted in appropriate bearings 30, and which is described in more detail in copending application, Ser. No. 15,761, filed Mar. 2, 1970, in the name of Kenneth Drucker. The rotor head of the centrifuge is keyed to the upper end of the shaft 27, and it is rapidly rotated within the housing 10 when the motor is energized.

As shown in FIG. I, a latch plate 34 is mounted on one edge of the lid 20, and a latch mechanism 36 is mounted on the top I0 adjacent the latch plate 34. As shown in FIG. 4, for exam ple, a latch 38 is slidable in the latch mechanism 36 and extends into a slot 40 in the latch plate 34 (see also FIG. 3). As also shown in FIGS. 3 and 4, a permanent magnet 42 is mounted on the latch plate 34, so that when the lid 20 is closed, the permanent magnet is brought into proximity with a reed switch 44 to actuate the switch 44 when the lid is closed.

The latch 38 is moved to its position illustrated in FIG. 4 when a solenoid 46 is energized. The: solenoid is coupled to the latch through a lever arm 48 pivotally mounted in the latch mechanism by means of a pin 50. When the latch 38 is in the illustrated position of FIG. 4, a bracket 52 at the left-hand end of the latch actuates a switch 56. A spring 58 returns the latch to the left in FIG. 4 when the solenoid 46 is deenergized. It will be appreciated, of course, that other types of latch mechanisms may be used to suit different lid configurations.

As shown in FIGS. 1 and 5, a tachometer rotor 60 is mounted on the shaft 27 of the motor 26 so as to rotate with the motor shaft. The tachometer rotor 60 is formed of appropriate magnetic material, and it is centrally located in a laminated magnetic core 62. A sensing winding 64 is wound around the core 62, and that winding, for example, may comprise 325 turns of No. 30 wire. As the motor shaft rotates, an alternating waveform is produced across the winding 64 which is applied to a usual converter 65. The converter changes the alternating waveform into discrete pulses (A), and these are fed to the base of an NPN-transistor 0110, the emitter of which is grounded. The converter 65 may have any appropriate circuit.

The collector of the transistor 010 is connected to the positive terminal of a l2-volt source through a resistor R102, and the base of the transistor is connected to that terminal through a resistor R100. The transistor Qll0 serves to invert the pulses (A) from the converter to produce positive pulses such as shown by the waveform (B). The positive pulses of waveform B are applied through a diode D to a capacitor C100 which introduces a resulting analog signal to a Darlington circuit designated Q12. The Darlington circuit exhibits the desired high-input impedance, and it produces an output analog signal across the grounded resistor R103. The latter signal is applied to an NPN-transistor Q13 through a limiting resistor R104, and the latter resistor serves to energize a relay designated RLY l."

The positive pulses (B) applied through the diode D1100 are used to charge the capacitor C100 to .a particular direct current level which depends upon the repetition frequency of the pulses which, in turn, depends upon the speed of rotation of the shaft 27. The capacitor C100 may have a value, for example, of 0.27 microfarads. Only when the speed of rotation of the rotor head falls below a predetermined threshold speed, does the voltage across the capacitor C100 fall to a sufficiently low value to cause the relay RLY l to become deenergized so as to cause the normally open contacts associated with that relay to open. When the aforesaid contacts open the solenoid 46 of FIG. 4 is deenergized which permits the lid 20 to be unlatched and opened. Other types of electricomechanical arrangements, such as inductive devices or mechanical dash pot devices, may be mechanically coupled to the motor shaft, so as to control the aforesaid solenoid 46 and cause it to become energized only when motor speed :is below a particular threshold.

The motor 26 is energized by the control circuit shown in FIG. 6. In the control circuit of FIG. 6 a unijunction transistor 01, which may be of the type presently designated 2N2646 may be connected as a pulse generator in circuit with a 560- kilohm resistor R5, a 560-ohm resistor R6, and a grounded 0.1 microfarad capacitor C2. The negative pulses from the transistor Q1 are introduced through a 200 picofarad coupling capacitor C3 to the junction of a l0-kilohm potentiometer R3 and a 5.6 kilohm resistor R2. The potentiometer R3 is connected to a grounded 33 kilohm resistor R4. The negative pulses appear across the resistors R2, R3 and R4, and these pulses are picked up by the adjustable arm of the potentiometer R3 alsasloiz Pmmenm 4m SHEET 3 OF 3 jAlve/vroe DEE Mfv/z. LE

ks/vae/ car am sz/eww FUNCTION GENERATOR The present invention pertains generally to a function generator, and, more particularly, to a circuit for generating a sawtooth or ramp signal waveform which is selectively adjustable in shape.

BACKGROUND OF THE INVENTION There are many situations in which it is desirable to provide a sawtooth or ramp signal waveform which can be adjusted to compensate for nonlinearities or other system errors. For example, in a cathode-ray tube display system, a typical nonlinearity occurs due to the flat face display. This nonlinearity is often referred to as geometric distortion and is the inherent result of a linear angularly displaced cathode-ray beam sweeping from one extremity to another of the tube face which is relatively flat. A variety of similar types of nonlinearities occur in transducers, servos, meters and recorders of all kinds for which compensation can be accomplished with an adjustable ramp signal.

OBJECTS AND SUMMARY OF THE INVENTION It is therefore a primary aim and object of the present invention to provide a circuit for generating a ramp function signal of selectively variable characteristic shapes while the am plitude remains constant.

Another object of the invention is to provide a function generator for producing a ramp voltage signal in which the signal may be selectively modified to bow upwardly or downwardly from a predetermined linear form.

A further object of the invention is the provision of a ramp signal generator which can be selectively modified to provide an adjustable degree of either 8- or N-curvature.

A still further object of the invention is to combine the adjustable bow upward or bow downward feature with its adjustable N or S-curvature.

Briefly, in accordance with the present invention, a timed trigger pulse turns on a transistor which discharges a capacitor, which transistor, when off, allows the capacitor to begin to charge from zero in a positive direction. The voltage on the capacitor, through an isolation emitter-follower is applied to one input of a differential amplifiersThe signal output of one of the transistors comprising the differential amplifier is inverted and amplified and the signal of the other transistor is amplified, but not inverted.

A first potentiometer related to the differential amplifier output signals produces an exponential voltage across the capacitor that bows downwardly as it charges, when the potentiometer is set to a specified midadjustment. Adjustment of the potentiometer in a direction toward a first extreme produces a charging current on the capacitor that is constant and the voltage waveform is therefore linear. Adjustment of the potentiometer toward the first extreme produces an increasing voltage, causing the charging waveform on the capacitor to bow upwardly. The potentiometer accordingly provides a wide range of adjustments on ramp voltage waveform bowing with little change in ramp amplitude.

A pair of serially arranged back-to-back diodes coupled with the differential amplifier transistors provides an N-curve charging signal to the capacitor which is summed through a second potentiometer, with the output of the first potentiometer providing a composite waveform. The resultant N-shaped ramp waveform is adjusted in magnitude with the second potentiometer and the overall upward or downward curvature by setting the first potentiometer accordingly.

In a further aspect of the invention, S-curvature can be provided by reversing the polarity of the diodes.

DESCRIPTION OF THE DRAWINGS FIG. I is a function block diagram of a raster scan oscilloscope in which the function generator of the present invention can be used to linearize the display.

FIG. 2 is a circuit schematic of the ramp voltage or sawtooth generator of the present invention.

FIGS. 3a-e and 4a-4d are graphical depictions of various sawtooth or ramp voltage signal outputs obtainable by the circuit of the present invention.

FIG. 5 is a modification of FIG. 2 and FIG. 6is a modification of FIG. 2.

DESCRIPTION OF A PREFERRED EMBODIMENT With reference now to the drawings, and particularly to FIG. 1, there is shown there an oscilloscope monitoring system for providing a timed display of an unknown signal in which the function generation circuit of the present invention is especially advantageous. More particularly, the system includes a conventional cathode-ray tube display 10 having a vertical oscillator 11 for driving the vertical sweep 12 therefore. The vertical sweep also drives a high-voltage supply 13 (e.g., flyback transformer) for the cathode-ray tube while horizontal sweep is provided by circuit 14. The sawtooth generator circuit 15 of the invention is reset by a pulse from the high-voltage flyback transformer in supply 13, for example, to initiate production of a selectively variable ramp signal that is gated and compared in 16 with an incoming signal 17. When there is a predetermined correspondence in amplitude between the signal being monitored and the ramp signal, a gating signal energizes cathode drive 18 for presentation on the display 10. In a way that will be more fully described later herein, the sawtooth generator 15 is selectively adjustable to compensate for nonlinearities in presentation.

With reference now to FIG. 2 and the detailed circuital aspects, reset pulses on the line indicated as INPUT are applied to the base of a switching transistor 19, the emitter of which is connected to DC, or ground, lead 20 while its collector is biased through resistor 21 and the emitter-collector path of transistor 22 to DC+ lead 23.

The wiper of potentiometer 34 is connected to one end of potentiometer 35, the other end of which is connected to the common point of a pair of diodes 37 and 38 arranged in backto-back serial relation across the collectors of transistors 27 and 28.

A first signal to the differential amplifier is applied from the emitter of transistor 25 to the base of transistor 27. The second or reference signal is applied to the base of transistor 28 from the common point of resistances 39 and 40 arranged serially across 20 and 23.

Lead 41, interconnecting the wiper of potentiometer 35 and the base of transistor 22, conditions the transistor conduction and hence the capacitor-charging rate. As will be more clearly described, thetransistor conditioning is selectively variable by adjustment of the otentiometers 34 and 35.

Transistor 42 has its collector directly connected to negative lead 20 and its emitter biased through resistance 43 by positive line 23. Lead 44, interconnecting the emitter of transistor 25 and base of transistor 42, controls the conductivity of the latter transistor in accordance with the charge on the capacitor 24. Sawtooth or ramp output is taken at the emitter of transistor 42.

CIRCUIT OPERATION As already indicated, a positive-going reset pulse at INPUT causes transistor 19 to conduct and discharge capacitor 24. On removal of the reset pulse the capacitor initiates charging through resistance 21 and transistor 22, and the capacitorcharging potential is applied to differential amplifier transistor 27 through isolation transistor 25.

Assuming (See FIG. 5) for purposes of explanation that diodes 37 and 38 are removed, it is clear that the wiper of potentiometer 34 can be set to provide a constant DC signal to transistor 22. Accordingly, a typical exponential charging voltage is developed across capacitor 24, bowing downwardly with time.

Adjustment of the potentiometer wiper to the right (toward transistor 28) can be made until a point is reached at which the signal waveform at the potentiometer wiper is substantially identical to that of the charging capacitor. Accordingly, the voltage drop across resistance 21 is constant, the capacitorcharging current is constant, and the capacitor voltage waveform is a linear ramp. The output voltage waveform is, therefore, as shown in FIG. 3a of the drawings.

Further adjustment of the potentiometer wiper to the right as depicted in FIG. 2 produces an increasing voltage drop across resistance 21, which, in turn, produces a charging voltage waveform on the capacitor and the ramp signal output to be bowed upwardly. FIG. 30 illustrates the waveform obtained for this circuit condition.

On the other hand, adjustment of the potentiometer wiper to the left of the linear position provides a decreasing voltage across resistance 21. This, in turn, causes the capacitor-charging voltage, and thus the output ramp signal, to bow downwardly as shown in FIG. 3b.

Still for purposes of explanation, assume the potentiometer 34 is removed from the circuit and diodes 37 and 38 replaced in the circuit (See FIG. 6). During the initial capacitor-charging period, the waveform as seen at resistance 21 is a negativegoing ramp following transistor 27 current passing through diode 37 and potentiometer 35 to condition transistor 22. This will continue until the collector of transistor 28 becomes more positive than the collector of 27, at which time the capacitorcharging voltage becomes a positive-going ramp following the collector current of 28 that passes through diode 38 and potentiometer 35.

The result of the negative-going charging current followed by a positive-going one, is a so-called N-curve ramp as depicted in FIG. 32. That is, for approximately the first half of the output ramp signal it is bowed downwardly whereas the second half bows upwardly.

With both the diodes and potentiometer in the circuit, which is the usual operating arrangement, the voltage signal appearing on lead 41 is a composite of the above-described N- waveform provided via the diodes and the signal presented at the wiper of potentiometer 34. Proportioning of the N-signal with the fundamental single-curve ramp signal is provided by adjustment of potentiometer 35.

Use of the present invention provides a sawtooth or ramp signal having a waveform that can be selectively varied throughout a wide variety of shapes. FIG. 3e depicts the waveform obtained where the potentiometer 34 is set at the linear point, whereas FIGS. 4b and 4d show the results of the potentiometer being set to produce bowed upwardly and bowed downwardly ramps, respectively.

In certain cases, it may be desirable to produce a sawtooth or ramp signal characterized by an initial portion that is bowed upwardly, followed by a final portion bowed downwardly. This result, sometimes referred to as S-curvature, is obtained in the present circuit by reversing the polarity of both diodes such that the anodes are common. If this is done, ramp output as shown in FIGS. 3d, 4a and 4c are obtained when the potentiometer 34 is adjusted to the linear, bowed upwardly and bowed downwardly states, respectively.

What is claimed is:

l. A function generation circuit for producing a selectively modifiable ramp signal, comprising:

a capacitance having one electrode connected to one terminal of a DC source;

a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode;

a differential amplifier including a pair of transistors having one input terminal connected to one of said transistors of said differential amplifier to follow the capacitance charge signal and a second input terminal connected to a reference signal;

a potentiometer connecting the collectors of said pair of transistors, the wiper of said potentiometer connected to the base of said first-mentioned transistor.

2. A feedback circuit for providing a signal to modify the impedance state of a solid-state device in the charging circuit of a storage capacitor, comprising:

first and second three-electrode transistors, the base of one transistor provided with fixed reference by a DC source and the base of the other transistor connected to bias following the capacitor-charging state;

a first set of identical transistor electrodes connected through a resistance network to one terminal of the DC source;

the other set of identical transistor electrodes connected to the other DC source terminal; and

variable potentiometer means interconnecting said other set of identical transistor electrodes and the solid-state device thereby providing feedback control of capacitor charging.

3. A function generation circuit for producing a selectively modifiable ramp signal, comprising:

a capacitance having one electrode connected to one terminal of a DC source;

a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode;

a differential amplifier having one input terminal connected to follow the capacitance charge signal and a second input terminal connected to a reference signal;

selectively variable means interrelating the differential amplifier output and transistor base thereby controlling the charging rate of the capacitance, said differential amplifier including second and third transistors the bases of which serve as the first and second amplifier input terminals; said selectively variable means including a first resistance potentiometer interconnecting a pair of the same other electrodes of said differential amplifier transistors, and a second resistance potentiometer having one end of its resistance connected to the first potentiometer wiper and the other end of the same resistance biased by the DC source, the second potentiometer wiper connected to bias the first transistor base.

4. A function generation circuit for producing a selectively modifiable ramp signal, comprising:

a capacitance having .one electrode connected to one terminal of a DC source;

a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode;

a differential amplifier having one input terminal connected to follow the capacitance charge signal and a second input terminal connected to a reference signal;

selectively variable means interrelating the differential amplifier output and transistor base thereby controlling the charging rate of the capacitance, said differential amplifier including second and third transistors the bases of which serve as the first and second amplifier input terminals; said selectively variable means including a first resistance potentiometer interconnecting a pair of the same other electrodes of said differential amplifier transistors, and a second resistance potentiometer having one end of its resistance connected to the first potentiometer wiper and the other end of the same resistance biased by the DC source, the second potentiometer wiper connected to bias the first transistor base, and in which the pair of same other transistor electrodes are electrically related to one of the DC source terminals; and there is further provided a pair of oppositely poled diode means serially arranged between said pair of other transistor electrodes, and the second potentiometer resistance other end is connected to the common point of the diode means.

5. A function generation circuit for producing a selectively modifiable ramp signal, comprising:

a capacitance having one electrode connected to one terminal of a DC source;

a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode;

a differential amplifier including a pair of transistors having one input terminal connected to one of said transistors of 6 said differential amplifier to follow the capacitance modifiable ramp signal comprising a capacitance having one charge signal and a second input terminal connected to a electrode connected to one terminal of a DC source, reference signal; a transistor having a base emitter and collector with its a potentiometer connecting the collectors of said pair of emitter-collector serially interconnecting the other DC transistors and the wiper of said potentiometer connected 5 ur rm l and the other capacitance electrode; to the base of said first-mentioned transistor. a differential amplifier including a pair of transistors having 6, A f ti eneratio i it of l i 5 a ir f one input terminal connected to one of said transistors of positely poled diodes connected to the collectors of said dif- Said dlffel'emlal p follow the capacitance ferential amplifier transistors and in which the connection to charge slgnfil and a second input terminal coflmcled 10 a the base of said first-mentioned transistor includes a poten- 10 f 8F tiometer connected to the wiper of said first-mentioned potena P of PPQ Y p dlPdeS cqnnectcq to the Collector tiometer and the other end of said second-mentioned potenof thetranslstors P Sald d'fferent'al amphfier tiometer connected to the common point of said diode pair a poemfometerfeslstance P f a Polnt of and the wiper of said second-mentioned potentiometer condlode and the w'Per of f potennofmter nected to the base of Said first memioncd transistor. nected to the base of said first-mentioned transistor.

7. A function generation circuit for producing a selectively 

1. A function generation circuit for producing a selectively modifiable ramp signal, comprising: a capacitance having one electrode connected to one terminal of a DC source; a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode; a differential amplifier including a pair of transistors having one input terminal connected to one of said transistors of said differential amplifier to follow the capacitance charge signal and a second input terminal connected to a reference signal; a potentiometer connecting the collectors of said pair of transistors, the wiper of said potentiometer connected to the base of said first-mentioned transistor.
 2. A feedback circuit for providing a signal to modify the impedance state of a solid-state device in the charging circuit of a storage capacitor, comprising: first and second three-electrode transistors, the base of one transistor provided with fixed reference by a DC source and the base of the other transistor connected to bias following the capacitor-charging state; a first set of identical transistor electrodes connected through a resistance network to one terminal of the DC source; the other set of identical transistor electrodes connected to the other DC source terminal; and variable potentiometer means interconnecting said other set of identical transistor electrodes and the solid-state device thereby providing feedback control of capacitor charging.
 3. A function generation circuit for producing a selectively modifiable ramp signal, comprising: a capacitance having one electrode connected to one terminal of a DC source; a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode; a differential amplifier having one input terminal connected to follow the capacitance charge signal and a second input terminal connected to a reference signal; selectively variable means interrelating the differential amplifier output and transistor base thereby controlling the charging rate of the capacitance, said differential amplifier including second and third transistors the bases of which serve as the first and second amplifier input terminals; said selectively variable means including a first resistance potentiometer interconnecting a pair of the same other electrodes of said differential amplifier transistors, and a second resistance potentiometer having one end of its resistance connected to the first potentiometer wiper and the other end of the same resistance biased by the DC source, the second potentiometer wiper connected to bias the first transistor base.
 4. A function generation circuit for producing a selectively modifiable ramp signal, comprising: a capacitance having one electrode connected to one terminal of a DC source; a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode; a differential amplifier having one input terminal connected to follow the capacitance charge signal and a second input terminal connected to a reference signal; selectively variable means interrelating the differential amplifier output and transistor base thereby controlling the charging rate oF the capacitance, said differential amplifier including second and third transistors the bases of which serve as the first and second amplifier input terminals; said selectively variable means including a first resistance potentiometer interconnecting a pair of the same other electrodes of said differential amplifier transistors, and a second resistance potentiometer having one end of its resistance connected to the first potentiometer wiper and the other end of the same resistance biased by the DC source, the second potentiometer wiper connected to bias the first transistor base, and in which the pair of same other transistor electrodes are electrically related to one of the DC source terminals; and there is further provided a pair of oppositely poled diode means serially arranged between said pair of other transistor electrodes, and the second potentiometer resistance other end is connected to the common point of the diode means.
 5. A function generation circuit for producing a selectively modifiable ramp signal, comprising: a capacitance having one electrode connected to one terminal of a DC source; a transistor having a base, emitter and collector, with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode; a differential amplifier including a pair of transistors having one input terminal connected to one of said transistors of said differential amplifier to follow the capacitance charge signal and a second input terminal connected to a reference signal; a potentiometer connecting the collectors of said pair of transistors and the wiper of said potentiometer connected to the base of said first-mentioned transistor.
 6. A function generation circuit of claim 5, a pair of oppositely poled diodes connected to the collectors of said differential amplifier transistors and in which the connection to the base of said first-mentioned transistor includes a potentiometer connected to the wiper of said first-mentioned potentiometer and the other end of said second-mentioned potentiometer connected to the common point of said diode pair and the wiper of said second-mentioned potentiometer connected to the base of said first-mentioned transistor.
 7. A function generation circuit for producing a selectively modifiable ramp signal comprising a capacitance having one electrode connected to one terminal of a DC source, a transistor having a base emitter and collector with its emitter-collector serially interconnecting the other DC source terminal and the other capacitance electrode; a differential amplifier including a pair of transistors having one input terminal connected to one of said transistors of said differential amplifier to follow the capacitance charge signal and a second input terminal connected to a reference signal; a pair of oppositely poled diodes connected to the collector of the transistors of said differential amplifier a potentiometer resistance connected to a common point of said diode pair and the wiper of said potentiometer connected to the base of the said first-mentioned transistor. 